According to our sources, ThreadRipper will use a slightly modified version of the SP3 Socket studied for Naples.
Both ThreadRipper (SP3r2) and Naples (SP3) sockets will be LGA and will have 4094 pins. The main differences concern about the TDP and Main Board PCB implementation, as we can see in the table below.
| Socket | SP3 | SP3r2 |
| CPU | Naples | ThreadRipper |
| uArch | Zen | Zen |
| Node Max | 2+ | 1 |
| DDR4 Channel | 8 | 4 |
| MAX TDP Supported | 200W and more | 180W and more |
| Pins | 4094 | 4094 |
AMD will not commercialize a mid-level socket like Intel did (e.g. 1151 – 2011v3 – 3647), in order to maximize the economies of scale. Also, this choice will allow AMD to commercialize a HEDT CPU with 16C/32T, while Intel is struggling to realize a Skylake-X 16C/32T CPU within the LGA2066 Socket TDP limit (160W).